1994 / SYSTEM 11
PlayStation 1
RESEARCH AVAILABLESYSTEM MODEL
HARDWARE AT A GLANCE
A navigable map of the public dossier. It shows documented hardware domains, not physical wiring or implementation status.
RESEARCH GUIDE
DOCUMENTED HARDWARE
Research chapters explain the hardware. Production records separately show what REFORGE has tested or corrected.
01CPU Architecture — MIPS R3000ACHAPTER OVERVIEW
02GPUCHAPTER OVERVIEW
03Memory MapCHAPTER OVERVIEW
04DMACHAPTER OVERVIEW
05I/O & ControllersCHAPTER OVERVIEW
06BIOSCHAPTER OVERVIEW
07Recompilation NotesCHAPTER OVERVIEW
08I/O Dispatch Reference (Iteration 10 Synthesis)10 SUBTOPICS
- GTE (COP2) — Geometry Transformation Engine
- DMA Controller ($1F801080–$1F8010F8)
- Root Counters / Timers ($1F801100–$1F801130)
- SPU ($1F801C00–$1F801E00) — 24 Voices
- CD-ROM Controller ($1F801800–$1F801803)
- MDEC ($1F801820–$1F801828)
- DICR ($1F8010F4) — DMA Interrupt Control Register
- Complete I/O Register Dispatch Table
- x86-64 Dispatch Handler Stubs
- Verification Notes
VERIFICATION
PARITY BOUNDARIES
A passed boundary applies only to the named claim and evidence row below.
A native artifact is produced.
The requested headless run completes.
Fresh visible output is verified.
Scripted input changes title state.
Named game rules pass deterministic checks.
Corpus, build receipt, and human acceptance gates pass.
| SYSTEM / PUBLIC RESULT | L0BUILDS | L1LIVES | L2RENDERS | L3RESPONDS | L4MECHANICS | L5ACCEPTED |
|---|---|---|---|---|---|---|
| PlayStation 1Hardware dossier published; native-runtime verification not started | NOT TESTED | NOT TESTED | NOT TESTED | NOT TESTED | NOT TESTED | NOT TESTED |
PUBLIC SOURCES
READ THE DOCUMENTS
The public dossier is the readable source document. External references are linked separately so their scope can be checked directly.
PRODUCTION LEDGER